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Agilex™ 3 FPGA C-Series
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eASIC™ N3X Devices
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Agilex® 3 FPGAs and SoC FPGAs C-Series
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Company Name

By Source

Altera Solutions
Partner Solutions

Offering Types

Acceleration / AI / Cloud
- Artificial Intelligence (AI)
- Data Processing / Analysis / Acquisition
- Data Science
- Edge
- Machine Learning
- Neural Network
- Public / On Premise
- Regional / District / Central
- Storage / Compression
Boards / SOMs / Dev Kits
- COTS
- Daughter Card
- Development / Evaluation Kit
- DPU / IPU / AI NIC / SmartNIC
- PCI Express
- System-on-Module (SOM)
- VPX
Design Services
- Board Level Design (DS)
- Certification (DS)
- Custom IP (DS)
- Debug (DS)
- Design for Manufacturing (DS)
- FPGA Design (DS)
- Logistics (DS)
- Manufacturing (DS)
- Schematic / Layout Review & DFT (DS)
- SI / PI Simulation (DS)
- Software (DS)
- System Level Design (DS)
- Verification / Validation (DS)
EDA Tools / IDE
- Design
- Embedded Tools
- Protocol Analysis
- Simulation
- Verification
Education / Training
- Acceleration / Artificial Intelligence (AI)
- Design Optimization
- Digital Signal Processing
- Embedded Processing
- External Memory Interfaces
- HDL Design Methodologies
- Interface Protocols
- Quartus Design Flow
- Security
Intellectual Property (IP)
- Digital Signal Processing / AI
  - Artificial Intelligence
  - Error Correction
  - Filters /Transforms
  - Floating Point
  - Modulation
  - Video and Image Processing
- Interfaces
  - Audio / Video
  - Communication
  - Compute Express Link (CXL)
  - Ethernet
  - High Speed
  - Networking / Security
  - PCI Express (IP)
  - Serial
- Memory Controllers
  - DMA
  - Flash
  - SDRAM
  - SRAM
- Soft Embedded Processors
  - RISC V
- Transceivers & Basic Functions
  - Clocks, PLLs and Resets
  - Simulation, Debug and Verification
  - Transceivers
Manufacturer
- Board Level Design (MF)
- Certification (MF)
- Custom IP (MF)
- Debug (MF)
- Design for Manufacturing (MF)
- FPGA Design (MF)
- Logistics (MF)
- Manufacturing (MF)
- Schematic / Layout Review & DFT (MF)
- SI / PI Simulation (MF)
- Software (MF)
- System Level Design (MF)
- Verification / Validation (MF)
Software / OS / RTOS
- Drivers
- Embedded
- Operating System (OS)
- Real Time Operating System (RTOS)
System Integrator / Provider
- Board Integration
- Chassis construction
- Chip Integration
- Software Integration

Region

Americas
Asia Pacific
Europe & Middle East
Japan
People’s Republic of China

Device Family

Agilex™ 3 FPGA C-Series
Agilex™ 5 FPGA D-Series
Agilex™ 5 FPGA E-Series
Agilex™ 7 FPGA F-Series
Agilex™ 7 FPGA I-Series
Agilex™ 7 FPGA M-Series
Agilex™ 9 FPGA Direct RF-Series
Arria® 10 Bare Die
Arria® 10 GT FPGA
Arria® 10 GX FPGA
Arria® 10 SX FPGA
Arria® II GX FPGA
Arria® II GZ FPGA
Arria® V GT FPGA
Arria® V GX FPGA
Arria® V GZ FPGA
Arria® V ST FPGA
Arria® V ST SoC FPGA
Arria® V SX FPGA
Arria® V SX SoC FPGA
Cyclone® 10 GX FPGA
Cyclone® 10 LP FPGA
Cyclone® II FPGA
Cyclone® III Bare Die
Cyclone® III FPGA
Cyclone® III LS FPGA
Cyclone® IV E FPGA
Cyclone® IV GX FPGA
Cyclone® V E FPGA
Cyclone® V GT FPGA
Cyclone® V GX FPGA
Cyclone® V SE FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST FPGA
Cyclone® V ST SoC FPGA
Cyclone® V SX FPGA
Cyclone® V SX SoC FPGA
eASIC™ N3X Devices
eASIC™ N3XS Devices
eASIC™ N5X Devices
Agilex® 3 FPGAs and SoC FPGAs C-Series
Agilex® 5 FPGAs and SoC FPGAs D-Series
Agilex® 5 FPGAs and SoC FPGAs E-Series
Agilex® 7 FPGAs and SoC FPGAs F-Series
Agilex® 7 FPGAs and SoC FPGAs I-Series
Agilex® 7 FPGAs and SoC FPGAs M-Series
Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series
Arria® 10 GT FPGA
Arria® 10 GX FPGA
Arria® 10 SX SoC FPGA
Cyclone® 10 GX FPGA
Cyclone® 10 LP FPGA
eASIC® N3X Devices
eASIC® N3XS Devices
eASIC™ N3X Devices
eASIC™ N3XS Devices
MAX® 10 FPGA
Stratix® 10 AX SoC FPGA
Stratix® 10 DX FPGA
Stratix® 10 GX FPGA
Stratix® 10 SX SoC FPGA
Stratix® 10 TX FPGA
MAX® 10 FPGA
MAX® II CPLD
MAX® II Z CPLD
MAX® V CPLD
Mustang Mesa
Stratix® 10 AX FPGA
Stratix® 10 Bare Die
Stratix® 10 DX FPGA
Stratix® 10 GX FPGA
Stratix® 10 SX FPGA
Stratix® 10 TX FPGA
Stratix® III FPGA
Stratix® IV E FPGA
Stratix® IV GT FPGA
Stratix® IV GX FPGA
Stratix® V E FPGA
Stratix® V GS FPGA
Stratix® V GX FPGA

Market Segments

Access
- Cable Access
- Carrier Access
- Other Access
Aerospace
- Aerospace
ASIC Proto
- ASIC Emulation
- ASIC Prototyping
Broadcast
- Broadcast Studio
- ProAV
Consumer
- Gaming
- Home Audio/Video
- Multi-Functional Printer
- Other Consumer
Defense
- MIL COMMS
- Radar/Ew
Industrial
- Energy
- Industrial / Manufacturing
- Robotics
- Vision
Government
- Chassis construction
- Drivers
- Govt Infrastructure
- Other ADG
- Software Integration
Medical
- Imaging
- Lab/Life Sciences
- Non-Imaging Patient Devices
- Other Medical
- Ultrasound
- Video
Data Center OEM (IHV, ISV, SI, VAR)
- AI/HPC
- CDNs
- IaaS/PaaS
- Networking
- Storage
- Transmission
Transportation
- Automotive (Passenger Vehicles)
- Non-Automotive Transportation
- Charging Infrastructure
- Transportation Infrastructure (non-charging)
Data Center Cloud (Public, Private, Hybrid)
- AI/HPC
- IaaS/PaaS
- Networking
- CDNs
- Storage
- Transmission
Wireless
- Baseband
- AI-RAN
- NTN/Fixed Wireless
- DAS/repeater/RIS
- xhaul Hub
- RDU
- FWA/backhaul
- 5G/ 6G Radio
Test
- ATE
- RF Instrumentation
- Communication Tester
- Other Test

Program Level

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Select

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Sort By: A -> Z

Sort By: Z -> A

Sort By: Oldest first

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System Platform Migration

Transform your existing FPGA design with rsyocto's System Platform Migration Services to Altera's latest cutting-edge technologies by utilizing advanced Altera SoC FPGAs. By seamlessly integrating FPGA, SoC, Desktop and Cloud environments, we empower our partners to innovate faster and smarter by linking all the different advantages tightly together.This Service is especially made for converting a legacy (FPGA-based) product to a cutting-edge cloud-connected IoT device for the embedded filed by unlocking the potential of a highly profitable, service-based business model with personalized features that set your products apart. At rsyocto, we specialize exclusively in Altera SoC FPGAs, providing unmatched expertise in: FPGA design, real-time system design, ARM-based Hard Processor System (HPS) design, SoC FPGA interface design, Embedded Linux solutions, accelerator design and beyond. Our deep experience with Altera SoC FPGAs ensures a unique and optimized solution that combines FPGA

By rsyocto GmbH & Co. KG

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System Verilog Training

SystemVerilog is the most important language in verification, but can also be used for synthesis. Dizain-Sync's courses on SystemVerilog teach you how to use the language and apply this in your work.

By Dizain-Sync B.V.

View Details

SystemC training

For the shift-left in development, you want to simulate your design early in the development phase. SystemC is used widely by the industry to model your design blocks, and is supported by various simulators. Want to learn how to use this? Dizain-Sync can teach you!

By Dizain-Sync B.V.

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SystemVerilog for Verification

This 5-days course designed for ASIC & FPGA verification engineers that would like to use the SystemVerilog and UVM to verify digital designs. SystemVerilog is a significant new enhancement to Verilog and includes major extensions into abstract design, test-bench, formal, and C-based APIs.

By HandsOn-Training

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tCAM IP

In high-speed networking environments, efficient packet filtering is essential to maintain reliable and optimized data flow. Design Gateway’s tCAM IP core offers a high-performance, hardware-based solution that enables rapid packet classification using ternary matches—ideal for real-time network applications where speed and flexibility are critical. Unlike traditional memory, tCAM supports wildcard-based searches, making it especially effective for filtering complex rule sets in high-throughput scenarios. As software-based packet filtering struggles to meet the demands of growing data traffic, offloading these tasks to FPGA hardware delivers a significant performance advantage. By leveraging the power of Design Gateway’s tCAM IP core, users can dramatically reduce latency, increase throughput, and offload workloads from the CPU. This makes the solution ideal for applications such as high-speed routers, industrial networks, and edge computing systems. Our latest UDP Packet Filtering & S

By DesignGateway Co., Ltd.

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TCC IP

Turbo Convolutional Codes (TCC) are an advanced class of Forward Error Correction (FEC) techniques that provide near-Shannon limit performance in digital communications. Widely adopted in 3G, 4G LTE, satellite, aerospace, and defense-grade communication systems, TCCs significantly enhance data integrity and transmission reliability in noisy environments.

By Qbit Labs Incorporation

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TCPIP-100G: 100G TCP/UDP/IP Hardware Stack

The TCPIP-1G/10G core is a complete hardware TCP/IP stack that supports up to 32k sessions, DHCP, UDP with multicast, and offers configurable low-latency cut-through or reliable store-and-forward modes.

By Computer Aided Software Technologies, Inc (dba CAST)

View Details

TCPIP-1G/10G: 1G/10G TCP/IP Hardware Stack

The TCPIP-1G/10G core is a complete TCP/IP hardware protocol stack, enabling systems to connect to IP networks and exchange TCP data without a host processor. Acting as server or client, it autonomously opens, maintains, and closes TCP connections. Network parameters are configured via control registers, while data is exchanged over streaming interfaces. The core is highly configurable: up to 32,768 simultaneous TCP sessions can be supported, or just one for minimal area designs. Options include a DHCP client, reassembly of out-of-order packets, and integration of a UDP hardware stack with IGMPv3 multicast. Users may select cut-through mode for ultra-low latency and minimal buffering, or store-and-forward mode for verified, in-order delivery. Available in RTL or FPGA netlist form, the core is rigorously verified and provided with testbench, synthesis/simulation scripts, and full documentation, making it ideal for applications ranging from servers to edge devices.

By Computer Aided Software Technologies, Inc (dba CAST)

View Details

Terasic Cyclone® V SoC Development Kit with HSMC Connector (DE10-Standard)

The DE10-Standard Development Kit features an Altera SoC FPGA with dual-core ARM Cortex-A9 processors and programmable logic, delivering high performance, low power, and flexible reconfigurability for diverse design needs.

By Terasic Inc.

View Details

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