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Stratix® 10 TX Signal Integrity Development Kit

Altera

The Stratix® 10 TX Transceiver Signal Integrity Development Kit is a comprehensive platform designed to accelerate the development and validation of high-speed transceiver interfaces. It provides a robust environment for evaluating signal integrity, tuning PMA parameters, and verifying compliance with industry standards. The kit includes all necessary hardware and software tools to support rapid prototyping and testing of Stratix 10 TX FPGA designs.

This kit features a wide array of high-speed interfaces including QSFPDD (1x1, 1x2, 2x1), MXP, FMC+, and 2.4 mm RF connectors, enabling flexible testing scenarios across multiple protocols. The inclusion of a Gigabit Ethernet port, USB interface, and programmable clocking resources further enhances its versatility. With built-in tools like the Board Test System GUI and support for PRBS testing, loopback modes, and real-time error monitoring, this kit is ideal for engineers focused on transceiver performance a...

The Stratix® 10 TX Transceiver Signal Integrity Development Kit is a comprehensive platform designed to accelerate the development and validation of high-speed transceiver interfaces. It provides a robust environment for evaluating signal integrity, tuning PMA parameters, and verifying compliance with industry standards. The kit includes all necessary hardware and software tools to support rapid prototyping and testing of Stratix 10 TX FPGA designs.

This kit features a wide array of high-speed interfaces including QSFPDD (1x1, 1x2, 2x1), MXP, FMC+, and 2.4 mm RF connectors, enabling flexible testing scenarios across multiple protocols. The inclusion of a Gigabit Ethernet port, USB interface, and programmable clocking resources further enhances its versatility. With built-in tools like the Board Test System GUI and support for PRBS testing, loopback modes, and real-time error monitoring, this kit is ideal for engineers focused on transceiver performance and signal integrity optimization.

Key Features

  • Features the Stratix 10 TX FPGA (1ST280EY2F55E1VG) with transceiver performance up to 58 Gbps PAM4 and 28.9 Gbps NRZ
  • Includes 90 transceiver channels with QSFPDD, MXP, FMC+, and 2.4 mm RF interfaces
  • Provides onboard FPGA Download Cable II and external JTAG header for flexible programming
  • Features MAX V CPLD for power management, configuration, and system monitoring
  • Offers programmable clocking with Si5341 PLLs and Si549 oscillators
  • Includes Board Test System (BTS) GUI for configuration, diagnostics, and performance testing
  • Supports loopback testing on QSFPDD, MXP, FMC+, and SMA interfaces
  • Enables SmartVID power management and voltage trimming via Power Monitor GUI
  • Provides Ethernet connectivity via Marvell 88E1111 PHY and SGMII interface
  • Delivered with power supply, USB cable, and preloaded factory test images
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Offering Brief

Offering Brief

Device Family Stratix® 10 TX FPGA
Offering Status Production
Demo No
Form Factor Tabletop
Power 12V DC input via 6-pin ATX connector
Interfaces QSFPDD 1x1, 1x2, 2x1
MXP A/B
2.4 mm RF
Gb Ethernet
GPIO
UART
I2C
8x SMA clock inputs/outputs
Memory CFI NOR Flash: 2 × 1 Gbit, x16, asynchronous; EPCQL Flash: 1024 Mb, x4, quad-serial
Connectors FMC+ connector; QSFPDD cages; MXP connectors; 2.4 mm RF connectors; SMA clock connectors; Ethernet RJ-45; USB Type-B
Switches & LEDs 4 user push buttons; 4 user DIP switches; 4 user LEDs; 3 power status LEDs; 5 Ethernet status LEDs; 1 overtemp LED; MAX V reset, CPU reset, PGM select/config buttons

Stratix 10 TX SI Development Board

Power supply

USB cable

FMC+ loopback card

Ethernet cable

A one-year license for the Quartus® Prime Pro Edition design software is available upon purchase of the kit

Ordering Information

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