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LVDS Tunneling Protocol and Interface IP

Altera

LVDS Tunneling Protocol and Interface (LTPI) is a soft IP introduced in the DC-SCM 2.0 specification to facilitate the tunneling of low-speed signals between the host platform module (HPM) and secure control module (SCM) through the low-voltage differential signaling (LVDS) interfaces.

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Key Features

  • Compliant with OCP DC-SCM 2.0 LTPI 1.0 specifications
  • Supports all speed-grade configurations for the Agilex™ 5 devices
  • Supports up to five channel aggregation and disaggregation
  • Supports GPIO, I2C, UART, OEM, and data channel aggregations
  • Supports link training for reliable link operation
  • Supports up to 500 Mbps data rate for all speed-grade configurations in Agilex™ 5 devices
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Offering Brief

Offering Brief

Device Family Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series
Offering Status Production
Demo No
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available No
Compliance No
Development Language Encrypted Verilog

Encrypted Verilog source code

Design Example

Simulation Models

IP Evaluation Mode

Documentation: User Guide, IP Release Notes

Ordering Information

IP-LTPI

from Mouser

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