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Turbo-V FPGA IP Core

Altera

Forward-error correction (FEC) channel codes commonly improve the energy efficiency of wireless communication systems. Turbo codes are suitable for 3G and 4G mobile communications and satellite communications. You can use Turbo codes in other applications that require reliable information transfer over bandwidth- or latency-constrained communication links in the presence of data-corrupting noise. The 4G Turbo-V FPGA IP comprises a downlink and uplink accelerator for vRAN and includes the Turbo FPGA IP.

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Key Features

  • 3GPP LTE compliant with support for block sizes 40 to 6,144.
  • C and MATLAB bit-accurate models.
  • Code block cyclic redundancy code (CRC) attachment.
  • Turbo encoder.
  • Rate matcher with: Subblock interleaver, Bit collector, Bit selector, Bit pruner.
  • Subblock deinterleaver.
  • Turbo decoder with CRC check.
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Offering Brief

Offering Brief

Device Family Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance No
Development Language Encrypted Verilog, Encrypted VHDL

Encrypted Verilog source code

Design Example

Simulation Models

IP Evaluation Mode

Documentation: IP User Guide

Ordering Information

IP-TURBOV

from Mouser

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IP-TURBOV

from Digikey

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Documentation & Resources

design hub icon 4G Turbo-V FPGA IP User Guide

Market Segment and Sub-Segments

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Defense

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Defense

MIL COMMS

Radar/Ew

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Wireless

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Wireless

5G/ 6G Radio

Baseband

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