The 40G Ethernet MAC and PHY FPGA IP core offers IEEE 802.3ba-2010. 40 Gbps Ethernet is an industry standard and is compliant for media access control (MAC) and PHY (PCS + PMA) functions. It enables an FPGA to interface to another device over a copper or optical transceiver module. The IP supports IEEE 1588 v2 standard with two-step timestamping as well as backplane capability on a variety of Stratix or Arria FPGAs.