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DCAN XL - Revolutionary advancement bridging the gap between CAN FD and 100Mbit Ethernet

DCD-SEMI

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The DCAN XL IP presents a revolutionary advancement bridging the gap between CAN FD and 100Mbit Ethernet, making strides in data transmission technology. With support for data rates reaching up to 20 Mbit/s and accommodating data fields up to 2048 bytes in length, it surpasses previous standards. Moreover, it offers the flexibility of employing higher layer protocols and Ethernet frame tunneling, enhancing its versatility in various applications.

Retaining the reliability and advantages of the CAN protocol, this solution ensures seamless integration while catering to evolving technological needs. Backward compatibility with Classical CAN, CAN FD, and CAN XL further solidifies its adaptability. For physical connectivity to the CAN bus, external transceiver hardware is essential, with CAN transceivers for bitrates below 10Mbps and CAN SIC XL transceivers for bitrates exceeding 10Mbps.

Notably, the DCAN XL implementation from DCD incorporates a single...

The DCAN XL IP presents a revolutionary advancement bridging the gap between CAN FD and 100Mbit Ethernet, making strides in data transmission technology. With support for data rates reaching up to 20 Mbit/s and accommodating data fields up to 2048 bytes in length, it surpasses previous standards. Moreover, it offers the flexibility of employing higher layer protocols and Ethernet frame tunneling, enhancing its versatility in various applications.

Retaining the reliability and advantages of the CAN protocol, this solution ensures seamless integration while catering to evolving technological needs. Backward compatibility with Classical CAN, CAN FD, and CAN XL further solidifies its adaptability. For physical connectivity to the CAN bus, external transceiver hardware is essential, with CAN transceivers for bitrates below 10Mbps and CAN SIC XL transceivers for bitrates exceeding 10Mbps.

Notably, the DCAN XL implementation from DCD incorporates a single or dual-ported Message RAM located externally, facilitating efficient message handling through the Generic Master Interface.

This advanced solution is available in two versions, Basic and Safety-Enhanced, with the latter developed as an ISO26262-10 Safety Element out of Context. It can be further enhanced with necessary safety mechanisms, accompanied by comprehensive safety documentation meeting ISO26262 standards. Third-party audits validate the safety-related work products, ensuring compliance with Automotive Safety Integrity Level up to ASIL-D requirements.

The thorough FMEDA analysis provided by DCD offers step-by-step instructions for seamless integration and system-level safety analysis. Achieving ASIL-D readiness, this design is suitable for integration into Automotive Safety Systems, with the option for higher ASIL level readiness. For additional details and optional features, customers are encouraged to reach out to DCD support.

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Key Features

  • Designed in accordance with ISO 11898‐1:2024 specification and CiA610-1 specification
  • Supports CAN, CAN FD and CAN-XL frames
  • Supports up to 64 bytes CAN FD frame and up to 2048 bytes CAN-XL data frame
  • Flexible data rates supported
  • AUTOSAR support
  • SAE J1939 support
  • Simple 8/16/32‐bit CPU slave interface
  • Data rate up to 1Mbps in Classic CAN mode, up to 8Mbps in FD mode, up to 20Mbps in XL mode
  • Optional PWM coding allows bit-rates of 10 Mbit/s and more depending on the physical network design
  • Up to 128 Base ID filters
  • Up to 64 Extended ID filters
  • Basic and Safety-Enhanced - up to ASIL D
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Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, MAX® V CPLD, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Cyclone® IV E FPGA, Stratix® III FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance No
Latest Quartus Version Supported 25.1.1
Development Language Encrypted Verilog, Verilog

HDL Source Code

Testbench environment - automatic simulation macros, tests with reference responses

Synthesis scripts

Technical documentation

12 months of technical support

Ordering Information

DCAN XL

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Documentation & Resources

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