HSR & PRP Network Redundancy (IEC62439-3)

Overview Key Features Offering Brief What's Included Ordering Information Documentation & Resources Markets

NetTimeLogic GmbH

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The HSR & PRP Core from NetTimeLogic is a standalone Network Redundancy Core according to IEC62439-3 rev3. It allows connection to a redundant network supporting either the Parallel Redundancy Protocol (PRP) or the High-availability Seamless Redundancy Protocol (HSR). It can either run as a Dual Attached Node (DAN) being an endpoint or it can run as a Redundancy Box (RedBox) bridging between a redundant and a non-redundant network.

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Key Features

Supports the HSR and PRP redundancy protocol according to IEC62439-3 rev 3
Can run as Dual Attached Node (DAN) or as Redundancy Box (RedBox)
Supports HSR Mode H and Mode X and PRP Duplicate Discard Mode
PTP aware for use with PTP Utility Profile and TSN
Intercepts path between MAC and two PHYs (DAN), or three PHYs (RedBox)
Configurable number of maximum nodes supported on Ports A&B and Port C
Full line speed
Hardware supervision frame handling
AXI4 Light register set or static configuration

Offering Brief

Device Family	Arria® 10 SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Cyclone® V SX SoC FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE SoC FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Cyclone® IV E FPGA, Stratix® 10 AX SoC FPGA
Offering Status	Production
Demo	No
Integrated Testbench	Yes
Evaluation License	Yes
Design Examples Available	Yes
Compliance	No
Latest Quartus Version Supported	25.1.0
OS Support	Not required
Development Language	VHDL