Breadcrumb

...

Find Offerings

Find Offerings

Switch to Partners

Company Name

By Source

Altera Solutions
Partner Solutions

Offering Types

Acceleration / AI / Cloud
- Artificial Intelligence (AI)
- Data Processing / Analysis / Acquisition
- Data Science
- Edge
- Machine Learning
- Neural Network
- Public / On Premise
- Regional / District / Central
- Storage / Compression
Boards / SOMs / Dev Kits
- COTS
- Daughter Card
- Development / Evaluation Kit
- DPU / IPU / AI NIC / SmartNIC
- PCI Express
- System-on-Module (SOM)
- VPX
Design Services
- Board Level Design (DS)
- Certification (DS)
- Custom IP (DS)
- Debug (DS)
- Design for Manufacturing (DS)
- FPGA Design (DS)
- Logistics (DS)
- Manufacturing (DS)
- Schematic / Layout Review & DFT (DS)
- SI / PI Simulation (DS)
- Software (DS)
- System Level Design (DS)
- Verification / Validation (DS)
EDA Tools / IDE
- Design
- Embedded Tools
- Protocol Analysis
- Simulation
- Verification
Education / Training
- Acceleration / Artificial Intelligence (AI)
- Design Optimization
- Digital Signal Processing
- Embedded Processing
- External Memory Interfaces
- HDL Design Methodologies
- Interface Protocols
- Quartus Design Flow
- Security
Intellectual Property (IP)
- Digital Signal Processing / AI
  - Artificial Intelligence
  - Error Correction
  - Filters /Transforms
  - Floating Point
  - Modulation
  - Video and Image Processing
- Interfaces
  - Audio / Video
  - Communication
  - Compute Express Link (CXL)
  - Ethernet
  - High Speed
  - Networking / Security
  - PCI Express (IP)
  - Serial
- Memory Controllers
  - DMA
  - Flash
  - SDRAM
  - SRAM
- Soft Embedded Processors
  - RISC V
- Transceivers & Basic Functions
  - Clocks, PLLs and Resets
  - Simulation, Debug and Verification
  - Transceivers
Manufacturer
- Board Level Design (MF)
- Certification (MF)
- Custom IP (MF)
- Debug (MF)
- Design for Manufacturing (MF)
- FPGA Design (MF)
- Logistics (MF)
- Manufacturing (MF)
- Schematic / Layout Review & DFT (MF)
- SI / PI Simulation (MF)
- Software (MF)
- System Level Design (MF)
- Verification / Validation (MF)
Software / OS / RTOS
- Drivers
- Embedded
- Operating System (OS)
- Real Time Operating System (RTOS)
System Integrator / Provider
- Board Integration
- Chassis construction
- Chip Integration
- Software Integration

Region

Americas
Asia Pacific
Europe & Middle East
Japan
People’s Republic of China

Device Family

Agilex™ 3 FPGA C-Series
Agilex™ 5 FPGA D-Series
Agilex™ 5 FPGA E-Series
Agilex™ 7 FPGA F-Series
Agilex™ 7 FPGA I-Series
Agilex™ 7 FPGA M-Series
Agilex™ 9 FPGA Direct RF-Series
Arria® 10 Bare Die
Arria® 10 GT FPGA
Arria® 10 GX FPGA
Arria® 10 SX FPGA
Arria® II GX FPGA
Arria® II GZ FPGA
Arria® V GT FPGA
Arria® V GX FPGA
Arria® V GZ FPGA
Arria® V ST FPGA
Arria® V ST SoC FPGA
Arria® V SX FPGA
Arria® V SX SoC FPGA
Cyclone® 10 GX FPGA
Cyclone® 10 LP FPGA
Cyclone® II FPGA
Cyclone® III Bare Die
Cyclone® III FPGA
Cyclone® III LS FPGA
Cyclone® IV E FPGA
Cyclone® IV GX FPGA
Cyclone® V E FPGA
Cyclone® V GT FPGA
Cyclone® V GX FPGA
Cyclone® V SE FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST FPGA
Cyclone® V ST SoC FPGA
Cyclone® V SX FPGA
Cyclone® V SX SoC FPGA
eASIC™ N3X Devices
eASIC™ N3XS Devices
eASIC™ N5X Devices
Agilex® 3 FPGAs and SoC FPGAs C-Series
Agilex® 5 FPGAs and SoC FPGAs D-Series
Agilex® 5 FPGAs and SoC FPGAs E-Series
Agilex® 7 FPGAs and SoC FPGAs F-Series
Agilex® 7 FPGAs and SoC FPGAs I-Series
Agilex® 7 FPGAs and SoC FPGAs M-Series
Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series
Arria® 10 GT FPGA
Arria® 10 GX FPGA
Arria® 10 SX SoC FPGA
Cyclone® 10 GX FPGA
Cyclone® 10 LP FPGA
eASIC® N3X Devices
eASIC® N3XS Devices
eASIC™ N3X Devices
eASIC™ N3XS Devices
MAX® 10 FPGA
Stratix® 10 AX SoC FPGA
Stratix® 10 DX FPGA
Stratix® 10 GX FPGA
Stratix® 10 SX SoC FPGA
Stratix® 10 TX FPGA
MAX® 10 FPGA
MAX® II CPLD
MAX® II Z CPLD
MAX® V CPLD
Mustang Mesa
Stratix® 10 AX FPGA
Stratix® 10 Bare Die
Stratix® 10 DX FPGA
Stratix® 10 GX FPGA
Stratix® 10 SX FPGA
Stratix® 10 TX FPGA
Stratix® III FPGA
Stratix® IV E FPGA
Stratix® IV GT FPGA
Stratix® IV GX FPGA
Stratix® V E FPGA
Stratix® V GS FPGA
Stratix® V GX FPGA

Market Segments

Access
- Cable Access
- Carrier Access
- Other Access
Aerospace
- Aerospace
ASIC Proto
- ASIC Emulation
- ASIC Prototyping
Broadcast
- Broadcast Studio
- ProAV
Consumer
- Gaming
- Home Audio/Video
- Multi-Functional Printer
- Other Consumer
Defense
- MIL COMMS
- Radar/Ew
Industrial
- Energy
- Industrial / Manufacturing
- Robotics
- Vision
Government
- Chassis construction
- Drivers
- Govt Infrastructure
- Other ADG
- Software Integration
Medical
- Imaging
- Lab/Life Sciences
- Non-Imaging Patient Devices
- Other Medical
- Ultrasound
- Video
Data Center OEM (IHV, ISV, SI, VAR)
- AI/HPC
- CDNs
- IaaS/PaaS
- Networking
- Storage
- Transmission
Transportation
- Automotive (Passenger Vehicles)
- Non-Automotive Transportation
- Charging Infrastructure
- Transportation Infrastructure (non-charging)
Data Center Cloud (Public, Private, Hybrid)
- AI/HPC
- IaaS/PaaS
- Networking
- CDNs
- Storage
- Transmission
Wireless
- Baseband
- AI-RAN
- NTN/Fixed Wireless
- DAS/repeater/RIS
- xhaul Hub
- RDU
- FWA/backhaul
- 5G/ 6G Radio
Test
- ATE
- RF Instrumentation
- Communication Tester
- Other Test

Program Level

Premier

Preferred

Select

Member

Sort by

Sort By: A -> Z

Sort By: Z -> A

Sort By: Oldest first

Sort By: Newest first

Company Name

By Source

Altera Solutions
Partner Solutions

Offering Types

Acceleration / AI / Cloud
- Artificial Intelligence (AI)
- Data Processing / Analysis / Acquisition
- Data Science
- Edge
- Machine Learning
- Neural Network
- Public / On Premise
- Regional / District / Central
- Storage / Compression
Boards / SOMs / Dev Kits
- COTS
- Daughter Card
- Development / Evaluation Kit
- DPU / IPU / AI NIC / SmartNIC
- PCI Express
- System-on-Module (SOM)
- VPX
Design Services
- Board Level Design (DS)
- Certification (DS)
- Custom IP (DS)
- Debug (DS)
- Design for Manufacturing (DS)
- FPGA Design (DS)
- Logistics (DS)
- Manufacturing (DS)
- Schematic / Layout Review & DFT (DS)
- SI / PI Simulation (DS)
- Software (DS)
- System Level Design (DS)
- Verification / Validation (DS)
EDA Tools / IDE
- Design
- Embedded Tools
- Protocol Analysis
- Simulation
- Verification
Education / Training
- Acceleration / Artificial Intelligence (AI)
- Design Optimization
- Digital Signal Processing
- Embedded Processing
- External Memory Interfaces
- HDL Design Methodologies
- Interface Protocols
- Quartus Design Flow
- Security
Intellectual Property (IP)
- Digital Signal Processing / AI
  - Artificial Intelligence
  - Error Correction
  - Filters /Transforms
  - Floating Point
  - Modulation
  - Video and Image Processing
- Interfaces
  - Audio / Video
  - Communication
  - Compute Express Link (CXL)
  - Ethernet
  - High Speed
  - Networking / Security
  - PCI Express (IP)
  - Serial
- Memory Controllers
  - DMA
  - Flash
  - SDRAM
  - SRAM
- Soft Embedded Processors
  - RISC V
- Transceivers & Basic Functions
  - Clocks, PLLs and Resets
  - Simulation, Debug and Verification
  - Transceivers
Manufacturer
- Board Level Design (MF)
- Certification (MF)
- Custom IP (MF)
- Debug (MF)
- Design for Manufacturing (MF)
- FPGA Design (MF)
- Logistics (MF)
- Manufacturing (MF)
- Schematic / Layout Review & DFT (MF)
- SI / PI Simulation (MF)
- Software (MF)
- System Level Design (MF)
- Verification / Validation (MF)
Software / OS / RTOS
- Drivers
- Embedded
- Operating System (OS)
- Real Time Operating System (RTOS)
System Integrator / Provider
- Board Integration
- Chassis construction
- Chip Integration
- Software Integration

Region

Americas
Asia Pacific
Europe & Middle East
Japan
People’s Republic of China

Device Family

Agilex™ 3 FPGA C-Series
Agilex™ 5 FPGA D-Series
Agilex™ 5 FPGA E-Series
Agilex™ 7 FPGA F-Series
Agilex™ 7 FPGA I-Series
Agilex™ 7 FPGA M-Series
Agilex™ 9 FPGA Direct RF-Series
Arria® 10 Bare Die
Arria® 10 GT FPGA
Arria® 10 GX FPGA
Arria® 10 SX FPGA
Arria® II GX FPGA
Arria® II GZ FPGA
Arria® V GT FPGA
Arria® V GX FPGA
Arria® V GZ FPGA
Arria® V ST FPGA
Arria® V ST SoC FPGA
Arria® V SX FPGA
Arria® V SX SoC FPGA
Cyclone® 10 GX FPGA
Cyclone® 10 LP FPGA
Cyclone® II FPGA
Cyclone® III Bare Die
Cyclone® III FPGA
Cyclone® III LS FPGA
Cyclone® IV E FPGA
Cyclone® IV GX FPGA
Cyclone® V E FPGA
Cyclone® V GT FPGA
Cyclone® V GX FPGA
Cyclone® V SE FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST FPGA
Cyclone® V ST SoC FPGA
Cyclone® V SX FPGA
Cyclone® V SX SoC FPGA
eASIC™ N3X Devices
eASIC™ N3XS Devices
eASIC™ N5X Devices
Agilex® 3 FPGAs and SoC FPGAs C-Series
Agilex® 5 FPGAs and SoC FPGAs D-Series
Agilex® 5 FPGAs and SoC FPGAs E-Series
Agilex® 7 FPGAs and SoC FPGAs F-Series
Agilex® 7 FPGAs and SoC FPGAs I-Series
Agilex® 7 FPGAs and SoC FPGAs M-Series
Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series
Arria® 10 GT FPGA
Arria® 10 GX FPGA
Arria® 10 SX SoC FPGA
Cyclone® 10 GX FPGA
Cyclone® 10 LP FPGA
eASIC® N3X Devices
eASIC® N3XS Devices
eASIC™ N3X Devices
eASIC™ N3XS Devices
MAX® 10 FPGA
Stratix® 10 AX SoC FPGA
Stratix® 10 DX FPGA
Stratix® 10 GX FPGA
Stratix® 10 SX SoC FPGA
Stratix® 10 TX FPGA
MAX® 10 FPGA
MAX® II CPLD
MAX® II Z CPLD
MAX® V CPLD
Mustang Mesa
Stratix® 10 AX FPGA
Stratix® 10 Bare Die
Stratix® 10 DX FPGA
Stratix® 10 GX FPGA
Stratix® 10 SX FPGA
Stratix® 10 TX FPGA
Stratix® III FPGA
Stratix® IV E FPGA
Stratix® IV GT FPGA
Stratix® IV GX FPGA
Stratix® V E FPGA
Stratix® V GS FPGA
Stratix® V GX FPGA

Market Segments

Access
- Cable Access
- Carrier Access
- Other Access
Aerospace
- Aerospace
ASIC Proto
- ASIC Emulation
- ASIC Prototyping
Broadcast
- Broadcast Studio
- ProAV
Consumer
- Gaming
- Home Audio/Video
- Multi-Functional Printer
- Other Consumer
Defense
- MIL COMMS
- Radar/Ew
Industrial
- Energy
- Industrial / Manufacturing
- Robotics
- Vision
Government
- Chassis construction
- Drivers
- Govt Infrastructure
- Other ADG
- Software Integration
Medical
- Imaging
- Lab/Life Sciences
- Non-Imaging Patient Devices
- Other Medical
- Ultrasound
- Video
Data Center OEM (IHV, ISV, SI, VAR)
- AI/HPC
- CDNs
- IaaS/PaaS
- Networking
- Storage
- Transmission
Transportation
- Automotive (Passenger Vehicles)
- Non-Automotive Transportation
- Charging Infrastructure
- Transportation Infrastructure (non-charging)
Data Center Cloud (Public, Private, Hybrid)
- AI/HPC
- IaaS/PaaS
- Networking
- CDNs
- Storage
- Transmission
Wireless
- Baseband
- AI-RAN
- NTN/Fixed Wireless
- DAS/repeater/RIS
- xhaul Hub
- RDU
- FWA/backhaul
- 5G/ 6G Radio
Test
- ATE
- RF Instrumentation
- Communication Tester
- Other Test

Program Level

Premier

Preferred

Select

Member

Sort by

Sort By: A -> Z

Sort By: Z -> A

Sort By: Oldest first

Sort By: Newest first

KiviPQC-KEM - Post-Quantum Key Encapsulation IP Core (ML-KEM)

By KiviCore

View Details

L/H-Tile PCIe* Hard IP

L/H-Tile are each an FPGA companion tile that supports PCI Express* configurations up to PCIe 3.0 x16 in Endpoint (EP) and Root Port (RP) modes.

By Altera

View Details

L8051XC1: Legacy-Configurable 8051-Compatible Microcontroller IP Core

The L8051XC1 is an MCS®51-compatible microcontroller core designed to match the timing and peripherals of legacy 8051-based systems. It supports instruction execution every 12, 6, or 4 clock cycles and includes user-selectable architectural extensions such as multiple data pointers, a multiply/divide unit, and a power management unit. The core can be coupled with peripherals that match the behavior of those from legacy vendors like Intel, NXP, Infineon, Maxim, and TI. Several pre-configured versions are available, along with options for customization. It supports legacy code and modern development through CAST’s on-chip debugging features and compatibility with IAR Embedded Workbench and Keil uVision™ IDEs. With design experience dating back to 1997 and hundreds of 8051 IP customers, CAST ensures that the core is optimized for easy ASIC/FPGA reuse. It is strictly synchronous, with positive-edge clocking and no internal tri-states. At 65nm, the core uses just 7.9K–20K gates.

By Computer Aided Software Technologies, Inc (dba CAST)

View Details

LDPC for 5G NR (Silicon Proven IP for Altera Devices)

This IP core features a programmable LDPC decoder using the Min-Sum algorithm, designed for 5G NR performance. It supports HARQ with LLR accumulation and early iteration exit for enhanced decoding efficiency. Runtime-configurable iterations and low latency make it ideal for 5G baseband integration.

By Mobiveil Inc.

View Details

LDPC for eMMC (Silicon Proven IP for Altera Devices)

Mobiveil’s LDPC for eMMC offers robust error correction and flash endurance in a compact, low-power footprint. It is tailored for smartphones, tablets, and enterprise SSDs requiring scalable, high-reliability flash storage. The IP meets performance needs while extending memory life significantly.

By Mobiveil Inc.

View Details

LDPC for Flash Controller (Silicon Proven IP for Altera Devices)

Mobiveil’s LDPC Controller offers advanced LDPC error correction with statistical DSP. It addresses the reliability demands of MLC, TLC, and 3D NAND at advanced geometries while significantly extending flash memory life. Optimized for ultra-low power to high-performance SSD applications, it is scalable, patented, and highly customizable.

By Mobiveil Inc.

View Details

LDPC IP

The Low-Density Parity-Check (LDPC) IP Core is a high-throughput, low-latency forward error correction (FEC) engine designed to meet the rigorous requirements of next-generation communication and data storage systems. LDPC codes are known for their near-Shannon limit performance and are widely adopted in standards such as 5G NR, Wi-Fi 6/7, DVB-S2/S2X, G.hn, 10GBASE-T Ethernet, SATA, NVMe, and more.

By Qbit Labs Incorporation

View Details

LIN Bus Controller

LIN with UART half-duplex enhanced functionality - available in two versions – Basic and Safety-Enhanced

By DCD-SEMI

View Details

LIN: LIN Bus Master/Slave Controller

The LIN-CTRL core is a controller that transmits and receives complete LIN frames to perform serial communication according to the LIN Protocol Specification. It can be configured before the synthesis to operate as a master, slave or include both profiles. When configured with both – master and slave, then at run-time, the LIN-CTRL can operate either as a master or as a slave and supports versions 1.3, 2.0, 2.1, and 2.2 of the LIN protocol. The message transfers can be controlled via a microcontroller interface and a LIN transceiver is needed for the connection to the LIN bus. The LIN-CTRL core is a microcode-free design developed for reuse in ASIC and FPGA implementations. The robustly verified core has been production-proven multiple times. The LIN controller core is available in two versions: Standard, and Safety-Enhanced. The Safety-Enhanced versions are certified as ISO-26262 ASIL-D Ready.

By Computer Aided Software Technologies, Inc (dba CAST)

View Details

Pagination

Previous page
Page 44
Next page

Showing 388-396 of 666 Offerings

High-Performance

Mid-Range

Power and Cost-Optimized

AI Development Tools

FPGA Design & Simulation Tools

Embedded Design Tools & Software

IP Development Tools

High-Performance

Mid-Range

Power and Cost-Optimized

Interfaces

Memory Controllers

Digital Signal Processing & AI

Soft Embedded Processors

Transceivers & Basic Functions

Technology

Applications

FPGA Development Tools

Embedded Tools

Add-On Development Tools

Simulation Tools

Utilities

Licensing

Design Hubs

Developer Centers

Training

FPGA Developer Site

Design Store

All FPGA Documentation

Find Offerings

KiviPQC-KEM - Post-Quantum Key Encapsulation IP Core (ML-KEM)

L/H-Tile PCIe* Hard IP

L8051XC1: Legacy-Configurable 8051-Compatible Microcontroller IP Core

LDPC for 5G NR (Silicon Proven IP for Altera Devices)

LDPC for eMMC (Silicon Proven IP for Altera Devices)

LDPC for Flash Controller (Silicon Proven IP for Altera Devices)

LDPC IP

LIN Bus Controller

LIN: LIN Bus Master/Slave Controller

Products

High-Performance

Mid-Range

Power and Cost-Optimized

AI Development Tools

FPGA Design & Simulation Tools

Embedded Design Tools & Software

IP Development Tools

High-Performance

Mid-Range

Power and Cost-Optimized

Interfaces

Memory Controllers

Digital Signal Processing & AI

Soft Embedded Processors

Transceivers & Basic Functions

Solutions

Technology

Applications

Design

FPGA Development Tools

Embedded Tools

Add-On Development Tools

Simulation Tools

Utilities

Licensing

Design Hubs

Developer Centers

Training

FPGA Developer Site

Design Store

All FPGA Documentation

Support

About

Contact Us

Find Offerings

KiviPQC-KEM - Post-Quantum Key Encapsulation IP Core (ML-KEM)

L/H-Tile PCIe* Hard IP

L8051XC1: Legacy-Configurable 8051-Compatible Microcontroller IP Core

LDPC for 5G NR (Silicon Proven IP for Altera Devices)

LDPC for eMMC (Silicon Proven IP for Altera Devices)

LDPC for Flash Controller (Silicon Proven IP for Altera Devices)

LDPC IP

LIN Bus Controller

LIN: LIN Bus Master/Slave Controller