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tCAM IP

DesignGateway Co., Ltd.

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In high-speed networking environments, efficient packet filtering is essential to maintain reliable and optimized data flow. Design Gateway’s tCAM IP core offers a high-performance, hardware-based solution that enables rapid packet classification using ternary matches—ideal for real-time network applications where speed and flexibility are critical. Unlike traditional memory, tCAM supports wildcard-based searches, making it especially effective for filtering complex rule sets in high-throughput scenarios. As software-based packet filtering struggles to meet the demands of growing data traffic, offloading these tasks to FPGA hardware delivers a significant performance advantage. By leveraging the power of Design Gateway’s tCAM IP core, users can dramatically reduce latency, increase throughput, and offload workloads from the CPU. This makes the solution ideal for applications such as high-speed routers, industrial networks, and edge computing systems.

Key Features

  • High-Speed Packet Filtering: Up to 400 MSPS @ 400MHz searching speed, 1,000,000 Search/MHz
  • Low Latency: Searching latency is constant at 7 clock cycles
  • Flexible UDP Packet Filtering
  • FPGA Integration
  • Customizable
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Offering Brief

Offering Brief

Device Family Agilex™ 7 FPGA I-Series, Arria® 10 SX FPGA, Stratix® 10 GX FPGA
Offering Status Production
Integrated Testbench No
Evaluation License No
Design Examples Available Yes
Demo Yes
Compliance No
Latest Quartus Version Supported 23.1.0
Development Language Encrypted VHDL

Encrypted IP core

Reference Designs Quartus Project

Ordering Information

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