Scalable Ultra-High Throughput VESA DSC 1.2b Encoder

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Alma Technologies S.A.

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The UHT-DSC-E core from Alma Technologies is an advanced video encoder IP, compliant to the VESA Display Stream Compression (DSC) v1.2b standard. It supports encoding of 4:4:4, 4:2:2 and 4:2:0 video streams, in 8 to 16 bits sample depths. The core is scalable and it is available for Altera FPGA and SoC based designs.

The UHT-DSC-E is designed using internal (on-chip) memory blocks only, with simple and fully controllable streaming input and output interfaces. It is a complete and autonomous encoder, not needing any host system CPU or GPU support for its operation. Being carefully designed and rigorously verified, the UHT-DSC-E is a reliable and easy-to-use and integrate IP core.

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Key Features

Full compliance with the VESA DSC 1.2b specification
Backwards compatible with VESA DSC 1.1
Visually lossless compression for all types of content
All DSC 1.2b encoding mechanisms supported (MMAP, BP, MPP and ICH)
RGB and YCbCr input formats
8, 10, 12, 14 and 16 bits per color component dynamic range
Native support for 4:4:4, 4:2:2 and 4:2:0 sampling formats
Integrated bit accurate rate control (CBR or VBR mode of operation)
Up to 16 slices per line
Scalable architecture with configurable number of internal, parallel encoding Slice-engines - 1 pixel/clock/engine for 4:4:4, 2 pixel/clock/engine for 4:2:2/4:220 sampling formats
Operation without external memory - Very low internal memory requirements (a few image lines)
CPU/GPU-less, complete and standalone HW implementation

Offering Brief

Device Family	Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA
Offering Status	Production
Integrated Testbench	Yes
Evaluation License	No
Design Examples Available	No
Demo	No
Compliance	No
Latest Quartus Version Supported	24.3.1
Development Language	VHDL