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Compact Ethernet TSN Switch 10M/100M/1G/2.5G

Comcores ApS

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The 10M/100M/1G/2.5G compact Ethernet TSN Switch IP core is an advanced managed switch targeting automotive, avionics, and industrial applications. It is providing cut-through and supporting the TSN family of standards. It is compliant to several TSN profiles as defined by IEEE while offering the ultimately lowest gate count on the market.

The non-blocking 10M/100M/1G/2.5G compact managed Ethernet TSN switch IP from Comcores enables fine-grained traffic differentiation for rich implementations of packet prioritization enabling per port and per queue shaping on egress ports. The switch supports MAC learning, VLAN 802.1Q, multicast and broadcast as well as support for timing synchronization according to 802.1AS. Each port provides a native interface for GMII Ethernet PHY devices.

Key Features

  • Cut-through architecture
  • NETCONF YANG model support
  • MACsec is available for L2 protection
  • Automatic MAC address learning and aging
  • Extensive statistic reporting
  • QoS features like classification, queuing and priorities included optional support for TSN profiles like: IEEE/IEC 60802: Industrial Automation, IEEE P802.1DP: Aerospace onboard Ethernet Communications, IEEE P802.1DG: Automotive In-Vehicle Communications, IEEE P802.1CM: Fronthaul, IEEE P802.1DF: Service Provider Networks, IEEE 802.1BA: Audio-Video Bridging (AVB) Systems
  • Buffer size fully configurable
  • Configurable scheduling
  • Configurable tagging
  • SW package with driver, gPTP and NETCONF available
  • Supports GMII, RGMII and SGMII for attaching external PHY
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Offering Brief

Offering Brief

Device Family Agilex™ 5 FPGA D-Series, Agilex™ 5 FPGA E-Series, Agilex™ 7 FPGA F-Series, Agilex™ 7 FPGA I-Series, Agilex™ 7 FPGA M-Series, Agilex™ 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® II GX FPGA, Arria® II GZ FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® III FPGA, Cyclone® IV GX FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 TX FPGA, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GT FPGA, Stratix® IV GX FPGA, Stratix® V E FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available No
Demo No
Compliance No
Latest Quartus Version Supported 24.3.1
Development Language Encrypted Verilog, Verilog

Solid documentation, including User Manual and Release Note

Simulation Environment, including Simple Testbed, Test case and Test Script

Programming Register Specification

Timing Constraints in Synopsys SDC format

Access to support system and direct support from Comcores Engineers

Synopsys SGDC Files (optional)

Synopsys Lint, CDC and Waivers (optional)

Ordering Information

Market Segment and Sub-Segments