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Creonic DVB-S2X Wideband Decoder

Creonic GmbH

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Creonic provides IP cores for wideband (500 Msymb/s) DVB-S2X demodulation, LDPC/BCH decoding as well as modulation. The Creonic DVB-S2X wideband decoder is a silicon-proven, scalable solution that allows for symbol rates of up to 500 Msymb/s on state-of-the-art FPGAs.

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Key Features

  • Compliant with DVB-S2 and DVB-S2X
  • Support for decoding of BBFRAMEs
  • Support for ACM, CCM, and VCM
  • Support for short and normal frames (16 200 bits and 64 800 bits)
  • Support for QPSK, 8-PSK, 16-APSK, 32-APSK, 64-APSK, 128-APSK, and 256-APSK
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Offering Brief

Offering Brief

Device Family Arria® 10 SX SoC FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, MAX® 10 FPGA, Arria® V GZ FPGA, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, MAX® V CPLD, Agilex® 7 FPGAs and SoC FPGAs I-Series, Arria® V SX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX SoC FPGA, Agilex® 7 FPGAs and SoC FPGAs M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST SoC FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Agilex® 5 FPGAs and SoC FPGAs D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex® 7 FPGAs and SoC FPGAs F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX SoC FPGA, Stratix® III FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License No
Design Examples Available No
Demo No
Compliance No
Latest Quartus Version Supported 22.4.0
Development Language C/C++, Verilog, VHDL

Deliverable includes Verilog source code or synthesized netlist, VHDL testbench, and bit-accurate Matlab, C or C++ simulation model​

Ordering Information

Creonic DVB-S2X LDPC / BCH Wideband Decoder

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Documentation & Resources

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Market Segment and Sub-Segments

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Aerospace

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Aerospace

Aerospace

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Wireless

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Wireless

Baseband

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