CPU-less NVMe Host Controller IP core for PCIe Gen3 (NVMe IP)

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DesignGateway Co., Ltd.

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Design Gateway’s NVMe-IP core is a fully hardware-based NVMe™ Host Controller optimized for Altera FPGA platforms with PCIe Gen3 connectivity. By removing the need for embedded CPUs, external memory, or a software stack, this IP core significantly reduces system complexity while maintaining high-speed, low-latency performance. It is ideal for aerospace, defense, and medical applications that require stable and deterministic storage operation.

With full NVMe command processing in hardware and a 128-bit FIFO interface, the core supports sustained high-speed data transfer. Reference designs help accelerate development on supported Altera FPGA boards.

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Key Features

Fully hardware-based NVMe Host Controller with no need for CPU, software, or external memory
Supports PCIe Gen3 x4 interface for high-speed NVMe SSD access
128-bit FIFO interface for simple data transfer
Rich expansion options available: RAID0, file system integration, and PCIe switch support
Reference designs available for Altera FPGA Development Kits

Offering Brief

Device Family	Arria® V GX FPGA, Agilex® 5 FPGAs and SoC FPGAs E-Series, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Stratix® 10 GX FPGA
Offering Status	Production
Integrated Testbench	No
Evaluation License	No
Design Examples Available	Yes
Demo	Yes
Compliance	No
Latest Quartus Version Supported	23.1.0
Development Language	Encrypted VHDL