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CPU-less NVMe Host Controller IP core for PCIe Gen4 (NVMe IP)

DesignGateway Co., Ltd.

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Design Gateway’s NVMe-IP core is a fully hardware-based NVMe™ Host Controller designed for direct integration with PCIe Gen4 SSDs on Altera FPGA platforms. Built for use with the P-tile on Agilex™ 7 FPGAs, it eliminates the need for an embedded CPU, software stack, or external memory—simplifying the system while achieving low latency and high performance. This makes the core ideal for aerospace, defense, and medical applications, where reliable and deterministic data handling is critical. The IP core features a 256-bit FIFO interface and handles NVMe command generation entirely in hardware, supporting sustained high-speed data transfer. With no software overhead, it ensures consistent throughput and reduced design complexity. Reference designs and demo projects for Altera FPGA boards, including Agilex™ 7 F-series, help accelerate development and deployment of next-generation NVMe storage systems.

Key Features

  • Fully hardware-based NVMe Host Controller with no need for CPU, software, or external memory
  • Supports PCIe Gen4 x4 interface for high-speed NVMe SSD access
  • Achieves over 7 GB/s sustained write performance with enterprise SSDs
  • 256-bit FIFO interface for simple data transfer
  • Optimized for real-time applications in aerospace, defense, medical, and data logging systems
  • Reference designs available for Agilex™ 7 FPGA platforms with P-tile interface
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Offering Brief

Offering Brief

Device Family Agilex® 7 FPGAs and SoC FPGAs F-Series
Offering Status Production
Integrated Testbench No
Evaluation License No
Design Examples Available Yes
Demo Yes
Compliance No
Latest Quartus Version Supported 23.1.0
Development Language Encrypted VHDL

Encrypted IP core

Reference Designs Quartus Project

Ordering Information

Documentation & Resources

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