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Sensor Fusion & Autonomous Systems   

Integral & Open Systems,Inc

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Integral & Open Systems (IOS) designs FPGA-based multi-modal sensor fusion subsystems for autonomous platforms, defense ISR systems, and robotics applications. Targeting Altera Agilex 3/5/7/9 and Stratix 10 devices, our designs ingest and time-align data from LiDAR, automotive and millimeter-wave radar, EO/IR cameras, IMUs, and GNSS sensors, delivering deterministic low-latency fused outputs to downstream perception, planning, and control stacks.

Engagements cover sensor interface bring-up (CSI-2, GMSL, FPD-Link, PCIe Gen4/5, JESD204B/C for radar ADCs), high-precision time-stamping and PTP synchronization, point-cloud processing, image preprocessing and rectification, radar signal processing pipelines (CFAR, beamforming, Doppler), AI/ML-accelerated perception kernels mapped to AI Tensor Blocks on Agilex, and host-side fusion API integration. We also build the verification harness , synthetic stimuli, replay from real-world datasets, and hardware-in-t...

Integral & Open Systems (IOS) designs FPGA-based multi-modal sensor fusion subsystems for autonomous platforms, defense ISR systems, and robotics applications. Targeting Altera Agilex 3/5/7/9 and Stratix 10 devices, our designs ingest and time-align data from LiDAR, automotive and millimeter-wave radar, EO/IR cameras, IMUs, and GNSS sensors, delivering deterministic low-latency fused outputs to downstream perception, planning, and control stacks.

Engagements cover sensor interface bring-up (CSI-2, GMSL, FPD-Link, PCIe Gen4/5, JESD204B/C for radar ADCs), high-precision time-stamping and PTP synchronization, point-cloud processing, image preprocessing and rectification, radar signal processing pipelines (CFAR, beamforming, Doppler), AI/ML-accelerated perception kernels mapped to AI Tensor Blocks on Agilex, and host-side fusion API integration. We also build the verification harness , synthetic stimuli, replay from real-world datasets, and hardware-in-the-loop test rigs ,so the fusion subsystem can be regression-tested as the algorithm matures.

IOS pairs FPGA sensor fusion engineering with AI/ML perception, cloud, and DevSecOps teams under one roof, so the fusion design integrates cleanly with the customer's perception models and rides inside a defensible CI/CD pipeline. IOS is a CMMC Level 2 self-certified, JCP-certified (DD Form 2345) Small Disadvantaged Business with an active DARPA SBIR Phase II OTA (HR0011-26-9-E167) and GSA MAS contract 47QTCA23D00CP (SINs 518210C and 54151S) for rapid federal contracting.

Key Features

  • 1. Multi-modal sensor ingest: LiDAR, radar (auto + mmWave), EO/IR cameras, IMU, GNSS 2. Precision time-sync via PTP and hardware-stamped timing for cross-sensor alignment 3. Radar signal processing pipelines: CFAR, beamforming, Doppler 4. Point-cloud processing and image preprocessing / rectification 5. AI/ML perception kernels accelerated on Agilex AI Tensor Blocks 6. SystemVerilog/UVM verification harness with dataset replay and hardware-in-the-loop 7. Host fusion API with Linux, Windows, and ROS 2 / DDS middleware integration 8. CMMC L2, JCP-certified delivery for export-controlled programs
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Offering Brief

Offering Brief

Device Family Agilex™ 9 FPGA Direct RF-Series, Stratix® 10 TX FPGA, Agilex™ 7 FPGA I-Series, Stratix® 10 GX FPGA, Stratix® 10 DX FPGA, Agilex™ 5 FPGA E-Series, Agilex™ 3 FPGA C-Series, Agilex™ 7 FPGA F-Series, Stratix® 10 SX FPGA, Stratix® 10 AX FPGA
Offering Status Production
Demo No
Integrated Testbench No
Evaluation License No
Design Examples Available No
Compliance No
Latest Quartus Version Supported 26.1.0
Development Language C/C++, Verilog, VHDL
Prerequisites Customer-provided sensor specifications, target Altera device family selection, performance envelope (latency / throughput / power), data interface definitions, and access to representative sensor datasets or hardware for verification.
Languages English
Target Audience Defense and aerospace prime contractors, federal sponsors (DoD, IC, DARPA, NGA), autonomous vehicle and robotics platform integrators, UAS / UGV / maritime autonomy programs, C5ISR system integrators and commercial AI infrastructure builders
Duration Engagement duration scoped per project; typical sensor-fusion subsystem designs run 6–18 months from kickoff through silicon-validated delivery.
Hands On Lab False

1. Sensor I/O bring-up (CSI-2, GMSL, FPD-Link, PCIe Gen4/5, JESD204B/C) 2. Time-sync subsystem (PTP, hardware time-stamping, PPS distribution) 3. Point-cloud processing, image preprocessing and rectification 4. Radar signal processing pipelines (CFAR, beamforming, Doppler) 5. AI/ML perception kernels accelerated on AI Tensor Blocks 6. Host fusion API and driver stack 7. Verification harness: synthetic stimuli, dataset replay, HIL test rigs 8. Optional: DevSecOps release pipeline, cloud back-end integration

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