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IntelliProp SATA Host App IP Core (IPC-SA101A-HI)

IntelliProp: Experts in Memory and Data Storage IP

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The IPC-SA101A-HI SATA Host IP Core is designed to provide Altera FPGA applications with a robust, easy-to-use interface to industry-standard SATA Generation 1, 2, and 3 drives. By implementing the entire SATA protocol stack in hardware—including the Physical (PHY), Link, and Transport layers—it allows designers to focus on their primary application logic rather than the intricacies of SATA link training and error handling.

The core features a streamlined command interface that simplifies the issuance of Read/Write commands and manages DMA data transfers with high efficiency. It is silicon-proven on Altera Agilex, Stratix, and Arria families, making it an ideal choice for data-intensive applications such as industrial logging, aerospace storage, and high-performance computing (HPC) edge devices.

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Key Features

  • SATA 3.2 Industry Compliant: Supports 1.5Gbps, 3.0Gbps, and 6.0Gbps speeds with automatic negotiation.
  • All-Hardware Implementation: No embedded processor or firmware required for protocol management or data movement.
  • DMA Interface: High-efficiency data path designed for direct connection to FPGA internal memory or DMA engines.
  • Error Detection & Reporting: Built-in CRC generation/checking and comprehensive status registers for robust system monitoring.
  • Flexible Command Support: Handles standard SATA commands including 48-bit LBA and Native Command Queuing (NCQ).
  • Silicon-Proven: Validated across multiple generations of Altera silicon and a wide array of commercial SSDs/HDDs.
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Offering Brief

Offering Brief

Device Family Arria® 10 SX FPGA, Agilex™ 5 FPGA E-Series, Cyclone® V SX FPGA, Arria® V GZ FPGA, Agilex™ 7 FPGA I-Series, Arria® V SX FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX FPGA, Arria® 10 GT FPGA, Arria® V ST FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Agilex™ 5 FPGA D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Agilex™ 7 FPGA F-Series, Stratix® 10 AX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance Yes
Latest Quartus Version Supported 25.3.0
Development Language Encrypted Verilog, Encrypted VHDL, Verilog, VHDL

SATA Host IP Core: Encrypted Verilog/VHDL RTL optimized for Altera Quartus Prime Pro.

Comprehensive Testbench: UVM-based verification environment including SATA drive models for full-system simulation.

Reference Design: A complete, ready-to-run Altera FPGA project demonstrating disk initialization and data transfer.

Technical Documentation: Detailed User Guide, Register Maps, and Pin-out Specifications.

Direct Technical Support: Access to IntelliProp’s protocol experts for design review and integration assistance.

Ordering Information

IPC-SA101A-HI

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