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Altera Cyclone® IV E FPGA, High Definition Video Image Rotation

Orchid Technologies Engineering and Consulting, Inc.

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Image rotation of high definition video presents unique logic design demands. Video standards such a 720P and 1080P at frame rates of thirty or sixty frames per second present pixel rates above 100MHz. Low latency image rotation logic must perform rapid data transfer while maintaining sync with multiple video sources. OTEC multi-format image rotation logic performs image rotation from landscape to portrait display modes. HD video rates of 720 and 1080P are supported. Custom image controls such as white balance, gamma adjust, and lut lookups are provided.

High definition SDI video is input and decoded by an Altera Cyclone IV FPGA. HD SDI input video synchronization and image lock is performed on-the-fly. Dual RAM buffer systems allow single frame image latency between input and rotated output images.

Four lane MIPI display video output is produced by OTEC’s image rotation hardware. Taking HD SDI Video input in landscape mode, our video rotation syst...

Image rotation of high definition video presents unique logic design demands. Video standards such a 720P and 1080P at frame rates of thirty or sixty frames per second present pixel rates above 100MHz. Low latency image rotation logic must perform rapid data transfer while maintaining sync with multiple video sources. OTEC multi-format image rotation logic performs image rotation from landscape to portrait display modes. HD video rates of 720 and 1080P are supported. Custom image controls such as white balance, gamma adjust, and lut lookups are provided.

High definition SDI video is input and decoded by an Altera Cyclone IV FPGA. HD SDI input video synchronization and image lock is performed on-the-fly. Dual RAM buffer systems allow single frame image latency between input and rotated output images.

Four lane MIPI display video output is produced by OTEC’s image rotation hardware. Taking HD SDI Video input in landscape mode, our video rotation system provides 90 degree, single frame latency image rotation with output in multi-lane MIPI format. Portrait mode LCD displays are initialized and image information is presented to the display in its native mode.

Custom hardware performs backlight and initialization control. MIPI display initialization is accomplished under software control. A simple monitor interface provides user input to control start-up, image conversion, and display output features.

Key Features

Offering Brief

Offering Brief

Device Family Arria® 10 SX FPGA, Cyclone® IV GX FPGA, Agilex™ 5 FPGA E-Series, MAX® 10 FPGA, Cyclone® V SX FPGA, Arria® V GZ FPGA, Agilex™ 9 FPGA Direct RF-Series, MAX® V CPLD, Agilex™ 7 FPGA I-Series, Arria® V SX FPGA, Stratix® 10 DX FPGA, Stratix® 10 SX FPGA, Agilex™ 7 FPGA M-Series, Cyclone® V GT FPGA, Arria® 10 GT FPGA, Arria® V ST FPGA, Arria® 10 GX FPGA, Stratix® 10 TX FPGA, Cyclone® V SE FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Arria® V GX FPGA, Cyclone® V E FPGA, Agilex™ 3 FPGA C-Series, Cyclone® V GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA, Cyclone® V ST FPGA, Agilex™ 5 FPGA D-Series, Stratix® 10 GX FPGA, Arria® V GT FPGA, Cyclone® 10 LP FPGA, Agilex™ 7 FPGA F-Series, Cyclone® 10 GX FPGA, Stratix® 10 AX FPGA, Cyclone® IV E FPGA, Stratix® III FPGA
Offering Status Production

Design Note #96

Documentation & Resources

Market Segment and Sub-Segments