XJAnalyser Module

Overview Key Features Offering Brief What's Included Ordering Information Documentation & Resources Markets

XJTAG

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XJAnalyser Module provides an intuitive interface for setting output pin states and values, and reading input values from a circuit in near real time. The default view uses colour coding on a visual representation of devices in the circuit, but tables can also be used as can a logic analyser style view.

The module is available:

as an add-on to XJDeveloper, where it gives access to the Analyser screen and to the XJInvestigator application as an add-on to XJRunner, where it gives the ability to run the XJInvestigator application, XJTAG’s repair-focused test and debug environment for fault analysis as a standalone licence, where it gives the ability to run the XJAnalyser application which in addition to providing graphical JTAG chain control/view functionality also has the facility to run SVF and STAPL / JAM files.

XJInvestigator is a repair focused, integrated test and debug environment for fault analysis, combining the test capabilitie...

The module is available:

XJInvestigator is a repair focused, integrated test and debug environment for fault analysis, combining the test capabilities of XJRunner and XJAnalyser with additional diagnostic functionality.

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Key Features

Offering Brief

Device Family	Arria® II GX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST SoC FPGA, Arria® V SX SoC FPGA, Cyclone® III FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE SoC FPGA, Cyclone® V ST SoC FPGA, Cyclone® V SX SoC FPGA, Agilex® 3 FPGAs and SoC FPGAs C-Series, Agilex® 5 FPGAs and SoC FPGAs D-Series, Agilex® 5 FPGAs and SoC FPGAs E-Series, Agilex® 7 FPGAs and SoC FPGAs F-Series, Agilex® 7 FPGAs and SoC FPGAs I-Series, Agilex® 7 FPGAs and SoC FPGAs M-Series, Agilex® 9 FPGAs and SoC FPGAs Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX SoC FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, MAX® 10 FPGA, Stratix® 10 AX SoC FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX SoC FPGA, Stratix® 10 TX FPGA, MAX® V CPLD, Stratix® III FPGA, Stratix® IV E FPGA, Stratix® IV GX FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status	Production
OS Support	Windows 11

Control and Monitor JTAG Device Pins - Pin values can be set high, low, or toggled, with real-time colour indication. Pins can be monitored in a watch window that highlights changes automatically. Pins can also be grouped into buses, allowing values to be written to multiple pins at once.

Intuitive Pin Visualisation - JTAG chains can be viewed graphically with adjustable zoom, including split-screen views at different magnifications. Pin states can be monitored in tables or graphically via colour-coded device views. The Waveform View captures signal levels and transitions over time, with trigger capabilities to detect specific events and help identify intermittent faults.

Take Control of the Circuit - The XJAnalyser module supports continuous write-read JTAG cycles for instant feedback, or single-step cycles under user control. It can run SVF and STAPL/JAM files on any device sequence. A Golden Board comparison captures JTAG values from a known good board and highlights differences on boards with unexpected behaviour.