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802.11ax

Qbit Labs Incorporation

Member

The 802.11ax (Wi-Fi 6) IP Core is a next-gen wireless solution built for high-throughput, low-latency, and dense networks. Fully compliant with IEEE 802.11ax, it features OFDMA, MU-MIMO, 1024-QAM, and Target Wake Time.

Supporting 2.4/5 GHz (optional 6 GHz for Wi-Fi 6E), it suits applications from IoT and automotive to industrial and enterprise. Ideal for FPGA/ASIC implementation, it offers flexible PHY/MAC integration and robust performance in crowded environments.

Key Features

  • Full IEEE 802.11ax Compliance: Supports all mandatory PHY and MAC layer features of Wi-Fi 6.
  • Backward Compatibility: Interoperable with 802.11a/b/g/n/ac devices for seamless coexistence.
  • High Throughput and Low Latency: Up to 9.6 Gbps aggregated throughput using 8 spatial streams and 160 MHz channels.
  • OFDMA Support (Uplink & Downlink): Efficient channel utilization across multiple users in dense environments.
  • MU-MIMO (Multi-User MIMO): Supports up to 8x8 MU-MIMO for simultaneous user communication.
  • Dual Band Support: Operates over both 2.4 GHz and 5 GHz bands; optional 6 GHz support for Wi-Fi 6E.
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Offering Brief

Offering Brief

Device Family Agilex™ 7 FPGA F-Series, Agilex™ 7 FPGA I-Series, Agilex™ 7 FPGA M-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA
Offering Status Production
Integrated Testbench Yes
Evaluation License Yes
Design Examples Available Yes
Demo No
Compliance No
Latest Quartus Version Supported 24.3.1
Development Language Encrypted Verilog, Verilog

Synthesizable RTL source code

Directed/random/constrained-random sequences covering LTSSM, configuration, link training, FLIT mode, error injection (FEC/CRC scenarios), power states, reset

Embedded firmware / low-level SW

Software integration guide

Full design documentation

Ordering Information

Market Segment and Sub-Segments