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MPEG2 Video Encoder

System-On-Chip Technologies Inc.

Member

The MPEG-2 Video Encoder IP Core delivers high-performance encoding for single or multiple MPEG-2 video streams. Built on an all-hardware, highly parallel architecture, these processor-free CODEC IP Cores are engineered for superior efficiency. All-hardware design (no embedded software)

High Speed (Low latency)

Small Silicon Footprint

Low Power

High Reliability (due to hardware architecture)

High-Video Quality

Low Output Bandwidth

High-Output Bandwidth Version Available

User Controllable API

Option of IP Core or Module

Video Transmission (Network) Cores available

Development Board available

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Key Features

  • Fabric Only IP Core
  • Low Latency
  • Interlaced and Progressive support
  • Configurable bitrate
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Offering Brief

Offering Brief

Device Family Agilex™ 3 FPGA C-Series, Agilex™ 5 FPGA D-Series, Agilex™ 5 FPGA E-Series, Agilex™ 7 FPGA F-Series, Agilex™ 7 FPGA I-Series, Agilex™ 7 FPGA M-Series, Agilex™ 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® V E FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status Production
Integrated Testbench No
Evaluation License No
Design Examples Available Yes
Demo No
Compliance No
Latest Quartus Version Supported 24.3.0
Development Language Encrypted VHDL

Encrypyed Netlist

Integration Guide

Sample Integration

API Address Map

Ordering Information

EC-MPEG2-IPCORE

from Direct

$0.00

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Documentation & Resources

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