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H264 Video Decoder

System-On-Chip Technologies Inc.

Member

The H.264/AVC HD Video Decoder IP Core delivers real-time decoding of HD video/audio data. Supporting resolutions up to 1920×1080 at an impressive 120fps, it achieves ultra-low latency of just 0.25ms at 30fps and 0.125ms at 60fps.

Optimized for minimal FPGA resource usage, it boasts a compact footprint and ultra-low latency and power consumption, making it the perfect choice for power-sensitive electronics and high-performance processing systems.

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Our decoders feature a dynamic API, allowing real-time adjustments of key parameters like bit rate and precision to fit your specific application needs.

Key Features

  • 4k60
  • interlaced and progressive support
  • 8 and 10bit
  • HDR
  • Fabric Only Core
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Offering Brief

Offering Brief

Device Family Agilex® 5 FPGA E-Series, Agilex® 7 FPGA F-Series, Agilex® 7 FPGA I-Series, Agilex® 7 FPGA M-Series, Agilex® 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® V E FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status Production
Design Examples Available Yes
Latest Quartus Version Supported 24.3.0
Development Language Encrypted VHDL

IP Core

Integration Guide

API Register Map

Sample Integration

Ordering Information

Documentation & Resources

Market Segment and Sub-Segments