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ChaCha20-Poly1305 IP core

DesignGateway Co., Ltd.

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ChaCha20 provides high-speed encryption and decryption with strong resistance against timing attacks, while Poly1305 ensures message authentication and integrity. Together, they form a widely adopted AEAD construction. The core supports a 256-bit key size and a 96-bit IV size. It also supports zero-length Additional Authenticated Data (AAD) or plaintext input, making it flexible for a wide range of secure applications.

Key Features

  • Fully compliant with ChaCha20Poly1305 AEAD standard (RFC 8439)
  • Supports 256-bit key size and 96-bit IV
  • Supports zero-length AAD or data input
  • Peak throughput rate of 64 Mbits/MHz

Offering Brief

Offering Brief

Device Family Agilex™ 7 FPGA I-Series
Offering Status Development
Integrated Testbench No
Evaluation License No
Design Examples Available No
Demo No
Compliance No
Latest Quartus Version Supported 24.3.1
Development Language VHDL

Encrypted IP core

Reference Designs Quartus Project

Ordering Information

Documentation & Resources

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