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Introduction to Platform Designer

FPGA Authority

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This course provides a thorough introduction to Altera's Platform Designer tool and guides engineers from beginner to intermediate proficiency. Starting from the fundamentals of the Platform Designer environment, students progress through the complete IP integration workflow, learn to manage clock and reset domains, develop custom IP components, and integrate processor subsystems. The course bridges traditional Qsys knowledge with current Platform Designer methodology and equips participants to tackle real-world FPGA and SoC integration projects with confidence.

Platform Designer generates the complete system hierarchy during top-level system generation, enabling a team-based hierarchical design flow where large designs can be divided into subsystems and developed simultaneously by multiple team members. This course introduces hierarchical design concepts and subsystem reuse, laying the groundwork for the advanced course that follows.

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Offering Brief

Offering Brief

Device Family Agilex™ 3 FPGA C-Series, Agilex™ 5 FPGA D-Series, Agilex™ 5 FPGA E-Series, Agilex™ 7 FPGA F-Series, Agilex™ 7 FPGA I-Series, Agilex™ 7 FPGA M-Series, Agilex™ 9 FPGA Direct RF-Series, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® II GX FPGA, Arria® II GZ FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, Stratix® 10 AX FPGA, Stratix® 10 Bare Die, Stratix® 10 DX FPGA, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA, Stratix® V E FPGA, Stratix® V GS FPGA, Stratix® V GX FPGA
Offering Status Production
Prerequisites Working knowledge of digital logic design and HDL design.
Languages English
Target Audience Hardware and Software Engineers, FPGA Designers, SoC Developers, Verification Engineers, System Architects, Managers
Duration 2 Days
Hands On Lab True
OS Support Windows,Linux

PDF of slides, lab manual and lab files where required

Ordering Information

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