Leveraging AI Agents for SoC Design

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This course equips experienced engineers and architects with the knowledge and hands-on skills needed to integrate AI agents into modern System-on-Chip (SoC) design workflows. Participants will gain a thorough understanding of large language model (LLM) capabilities and limitations, multi-agent orchestration frameworks, and retrieval augmented generation (RAG) techniques as they apply to hardware and embedded software development.

The course begins by grounding attendees in AI agent fundamentals, then progressively builds toward advanced applications such as AI assisted RTL generation, automated design verification, constraint management, and firmware co-development. Each day combines lecture modules with hands-on labs using industry standard EDA tools from Altera and leading AI agent frameworks, ensuring that skills learned in class can be directly applied in production design environments.

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Key Features

Offering Brief

Device Family	Agilex™ 3 FPGA C-Series, Agilex™ 5 FPGA D-Series, Agilex™ 5 FPGA E-Series, Agilex™ 7 FPGA F-Series, Agilex™ 7 FPGA I-Series, Agilex™ 7 FPGA M-Series, Agilex™ 9 FPGA Direct RF-Series, Arria® 10 Bare Die, Arria® 10 GT FPGA, Arria® 10 GX FPGA, Arria® 10 SX FPGA, Arria® V GT FPGA, Arria® V GX FPGA, Arria® V GZ FPGA, Arria® V ST FPGA, Arria® V SX FPGA, Cyclone® 10 GX FPGA, Cyclone® 10 LP FPGA, Cyclone® IV E FPGA, Cyclone® IV GX FPGA, Cyclone® V E FPGA, Cyclone® V GT FPGA, Cyclone® V GX FPGA, Cyclone® V SE FPGA, Cyclone® V ST FPGA, Cyclone® V SX FPGA, MAX® 10 FPGA, Stratix® 10 AX FPGA, Stratix® 10 Bare Die, Stratix® 10 GX FPGA, Stratix® 10 SX FPGA, Stratix® 10 TX FPGA
Offering Status	Production
Prerequisites	Solid understanding of digital logic design and HDL coding. Experience with Quartus Prime.
Languages	English
Target Audience	Hardware and Software Engineers, FPGA Designers, System Architects, FPGA Design Teams
Duration	2 Days
Hands On Lab	False
OS Support	Windows,Linux

PDF of slides, lab manual and lab files where applicable

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