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AES-XTS: Storage Encrypt/Decrypt Engine

The AES-XTS encryption IP core implements hardware encryption/decryption for sector-based storage data. It uses the AES block cipher, in compliance with the NIST Advanced Encryption Standard, as a subroutine. The core processes 128 bits per cycle, and is programmable for 128- and 256-bit key lengths. Two architectural versions are available to suit system size and throughput requirements. The High Throughput XTS-X is more compact and can process 128 bits/cycle independent of the key size. The Higher Throughput XTS-X2 can process 256 bits/cycle independent of the key size. Both versions have a 128-bit data path. XTS (XEX-based Tweaked Codebook Mode with Ciphertext Stealing) is a mode of AES that has been specifically designed to encrypt fixed-size data where a possible threat has access to the stored data.

Agilex 7 and Stratix 10 FPGA E-Tile Hard IP

The Agilex 7 and Stratix 10 FPGA E-Tile incorporates a configurable, hardened Ethernet protocol stack compatible with the IEEE 802.3 High-Speed Ethernet Standard and the 25G and 50G Ethernet Specification, Draft 1.6 from the 25G Ethernet Consortium. The Intellectual Property (IP) core provides access to this hard IP at data rates of 10 Gbps, 25 Gbps, and 100 Gbps.

Agilex 7 F-Tile Ethernet Hard IP

The Agilex 7 FPGA F-Tile IP core implements Ethernet at data rates of 10 Gbps, 25 Gbps, 40 Gbps, 50 Gbps, 100 Gbps, 200 Gbps and 400 Gbps. The user can choose a media access control (MAC) and a physical coding sublayer (PCS) variation, a PCS-only variation, a Flexible Ethernet (FlexE) variation, or an Optical Transport Network (OTN) variation.

Agilex 7 I-Series 041b 3UVPX Plug In Module

A 3U VPX card featuring an Agilex 7 I-Series FPGA with 4 F-tiles, designed to deliver high-performance connectivity via PCIe Gen 4 and 40G Ethernet. Optimized for defense, aerospace, and high-performance computing systems. Supports high-bandwidth applications, real-time data processing, and secure communications.

Agilex™ 3 Development Kit: G71D

The iG-G71D is a compact and feature-rich development kit built to evaluate Altera® Agilex™ 3 SoC FPGA solutions. It offers comprehensive connectivity with 2.5G and Gigabit Ethernet, USB 3.0/2.0 via Type-C, PCIe Gen3 x4, and high-speed expansion through FMC+ and PMOD connectors. With additional interfaces including JTAG and a 20-pin HPS header (I2C, SPI, GPIOs), the G71D kit is ideal for prototyping embedded systems, industrial networking, and low-power edge applications.

Agilex™ 3 FPGA and SoC C-Series Development Kit

DK-A3W135BM16AEA: Agilex™ 3 FPGA and SoC C-Series Development Kit is a compact, power-efficient platform for embedded and edge applications, featuring DisplayPort 1.4, dual MIPI interfaces, and Raspberry Pi HAT expansion.

Agilex™ 3 FPGA C-Series Development Kit

[DISCONTINUED] DK-A3Y135BM16AEA: The Agilex™ 3 FPGA C-Series Development Kit is a compact, power-efficient platform for embedded and edge applications, featuring DisplayPort 1.4, dual MIPI interfaces, and Raspberry Pi HAT expansion.

Agilex™ 3 SoC FPGA SoM: iG-G71M

The iAgilex™ 3 is a compact and power-efficient System on Module built on the Agilex™ 3 C-Series FPGA with M16A package, designed for cost-sensitive, low-power edge applications. Featuring 4GB LPDDR4 (expandable to 8GB), 32GB eMMC storage, and 4 transceivers up to 12.5Gbps, it delivers up to 135K logic elements in a 50mm x 60mm form factor. With integrated PCIe Gen3 support and flexible memory and flash options, the G71M is ideal for industrial control, vision processing, and embedded computing at the edge.

Agilex™ 5 Development Kit: G58D

The iG-G58D is a feature-rich development kit designed to evaluate and accelerate designs on Altera® Agilex™ 5 SoMs. It offers robust connectivity with PCIe Gen4 x4, dual Ethernet (2.5G and Gigabit), USB 3.0/2.0 via Type-C, and high-speed expansion through FMC+, PMOD, and QSFP+ connectors. With support for HDMI IN/OUT, SDI IN/OUT, DisplayPort, and comprehensive debug interfaces, the G58D platform is ideal for prototyping AI, vision, and networking applications at the edge.