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Video and Vision Processing Suite

The Altera FPGA Video and Vision Processing Suite is a collection of next-generation Altera intellectual property (IP) functions that you can use to facilitate the development of custom video and image processing designs.

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Video Transcoder Cores

MPEG2 to H264 MPEG2 to H265 H264 to MPEG2 H264 to H265 H265 to MPEG2 H265 to H264

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Virtualyzr™ Pre-Silicon Verification (HW)

The Virtualyzr Side Channel Analysis license enables security evaluation of a design implementation at the pre-silicon level, before launching any foundry operation.

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Viterbi IP Core

The Viterbi Intel FPGA IP core generates high-performance, soft-decision Viterbi intellectual property (IP) functions that implement a wide range of standard Viterbi decoders.

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Volitio Cyclone® 10 GX Networking Platform

10G Ethernet capable system designed for Private Island open source project that utilizes the Altera Cyclone 10 GX. This FPGA is a very powerful device that provides 10 Gbps network connectivity using embedded high-speed transceivers. We utilize this high-performance system to develop custom networking and bridging solutions for our customers. Using our in-house manufacturing capabilities, hardware platform can be quickly modified per customer's requirements to include additional memory, transceivers, and other peripherals.

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VOLLO

Ultra-low latency machine learning inference accelerator for latency-critical applications. Runs on Altera Agilex 7 Series FPGAs. Proven over hundreds of thousands of production trading hours in financial trading and also winning in wireless telecoms, network security and defense.

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Warp FPGA IP

The Altera Warp FPGA IP core, part of the Video and Vision Processing (VVP) Suite, delivers a high-performance solution for applying geometric corrections and non-linear transformations to real-time video streams.

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Warping Engine IP Core

Memory -to memory or memory to stream Warping engine for projectors, fish-eye lense correction or Head Up Displays (HUDs).

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WILDSTAR 3AE1 3U OpenVPX FPGA Processor (WS3AE1)

WS3AE1 3U OpenVPX FPGA Processor is a SOSA™-aligned Direct RF solution that delivers high-performance processing and eight channels each of 64 Gsps ADC and DAC at a 10-bit resolution. It includes up to two Analog Interface Mezzanine Sites. These can be populated with Annapolis or 3rd party/customer-designed RF Cards for front-end personalization (e.g. pre-filtering or analog conditioning) for applications of interest.

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Showing 847-855 of 898 Offerings