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Nextera Video

About Nextera Video

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Certified Engineers

5

Languages

English

Headquarters: 1108 Via Treviso, Suite 200, El Dorado Hills, California, 95762, United States

Offering Type

Offerings

Nextera-Adeas' industry-leading IPMX FPGA IP cores contain everything needed to IPMX-Enable your new or existing products quickly and easily. A full IPMX Certified reference/demo design project is provided along with all of the drivers, daemons, system control software, and a Web GUI so customers can start with a working system and customize to their needs. Design services are also available to help accelerate time to market.

Provided as a Linux daemon, the Nextera NMOS core allows devices to seamlessly interoperate with any NMOS control panel/system for ST 2110 or IPMX facilities. The core is provided with detailed documentation and examples for interfacing with custom AV over IP FPGA cores. Available cores are NMOS IS-04, IS-05, IS-07, IS-08, IS-09, IS-11, IS-13, and Secure NMOS.

We provide a full offering of design services including Architecture, Board Design, FPGA Design, and Embedded Software Development.

Nextera-Adeas' industry-leading ST 2110 FPGA IP cores contain everything needed to IP-Enable your new or existing products quickly and easily. A full reference/demo design project is provided along with all of the drivers, daemons, system control software, and a Web GUI so customers can start with a working system and customize to their needs. Design services are also available to help accelerate time to market.

The Nextera-Adeas ST 2022-8 core enables SDI formatted signals over IP in a ST2110 environment.

Nextera's VIDIO 12G SDI FMC Card has been chosen by Altera for use in their SDI reference designs, including Agilex®, Cyclone®, and Stratix® development kits. The VIDIO FMC card is made in the USA, utilizes the latest generation Texas Instruments chips for unrivaled quality and jitter performance, and does not require any software to initialize. Each purchase includes access to the user guide, reference designs, schematics, assembly drawings, BOM, and more.

The ST 2059 PTP core is an FPGA IP core that generates timing and clock signals according to the SMPTE ST 2059 standard defined by the Society of Motion Picture and Television Engineers. These deterministic timing signals can be used to time synchronize audio and video systems to a SMPTE ST2059 (PTP) grandmaster. The IP core provides broadcast and professional AV equipment the ability to support deterministic generation of timing (signals) for video and audio systems.