Are you trying to improve the signal integrity of your transceiver links? This can be a challenge with the multi-gigabit interfaces supported by Arria® 10 devices. This training introduces you to the Transceiver Toolkit found in the Quartus® Prime software v. 15.1 & shows you how to use it to optimize your high-speed channel’s transmitter & receiver analog settings. Learn how to enable toolkit support to connect to transceiver channel buffers & perform various link tests. Using Transceiver Toolkit features like Auto Sweep, you will be able to verify & potentially improve the Bit Error Rate (BER) of your system.
This training covers the Arria 10 family. For Cyclone® V, Arria V & Stratix® V devices, see the online training, Transceiver Toolkit for 28-nm Devices.
At Course Completion
You will be able to:
- Enable Transceiver Toolkit support in your own Arria 10 design
- Setup and launch the Transceiver Toolkit to perform a high speed link test
- Perform BER testing using the Auto Sweep feature in the toolkit
- Select the best analog settings to optimize the signal integrity of your transceiver link
- Basic knowledge of the Quartus software
- General understanding of FPGA architecture including transceiver architecture
- General understanding of transceiver reconfiguration concepts
We recommend completing the following courses:
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum: