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CSENT-Rx: SENT/SAE J2716 Receiver

The CSENT-RX core implements a receiver for the Single Edge Nibble Transmission (SENT) protocol. It complies with the SAE J2716 standard and supports both synchronous and asynchronous sensors. It can be used for receiving data from one or multiple sensors. The CSENT-RX provides access to its data registers via a 32-bit APB, or AXI4-Lite bus interface. The core provides a glitch filter on the serial data input and has data mapping functionality on received data to offload the connected host from data formatting. The received data are accessible via the register interface. The core is also capable of generating trigger pulses requesting synchronous sensors to send data. A set of handshaking signals facilitates the integration with an external DMA controller. The CSENT-RX core is available in two versions: Standard and Safety-Enhanced: ISO-26262 ASIL B Ready.

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CSENT-TX CSENT Transmitter

The CSENT-TX core implements a transmitter for the Single Edge Nibble Transmission (SENT) protocol. It complies with the SAE J2716 standard and supports both synchronous and asynchronous transmissions. In asynchronous mode, the core autonomously initiates transmission, as data become available in its input-data register. Under synchronous mode, transmission is triggered by either the host system via the core’s control registers, or when the core receives a valid master trigger pulse via the SENT interface. The core reports its status using two signals, one indicating that a transmission is in progress, and a second one reporting the completion of a frame's transmission. The CSENT-TX also provides access to its registers via a 32-bit APB, or an AXI4-Lite or a generic interface. The core contains no latches or tri-states, is fully synchronous with a single clock domain, and includes no multicycle or false paths. The CSENT-TX core has been rigorously verified and is production proven.

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Custom Development: from Requirements over Specification, Design, Architecture Implementation and Verification to Deployment.

NetTimeLogic provides design services in the areas of FPGA and embedded software development, especially in the areas of time synchronization and network redundancy. From requirements engineering over custom IP core development, OS porting, drivers, GUIs and testing to education and consulting, we can help you to bring your system to a success. We develop FPGA firmware in VHDL and Verilog. From simple entities to complete IP core solution we can help you in every step of FPGA development

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Custom Engineering Services

Orthogone is a multidisciplinary engineering firm that provides innovative solutions for complex technological challenges. We offer research and development, electronics design, and digital transformation consulting services across various industries. Our expertise supports the creation of innovative products that require extensive knowledge in software development, embedded systems, field-programmable gate arrays (FPGAs), and system-on-chips (SoCs).

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CVI - Customizable Video Input Controller IP Core Family

Video input controller capturing an RGB or ITU-R BT.656/BT.601 video input stream to memory with configurable functions, e.g., scaling, color format conversion, clipping, dithering.

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CXL 3.x

The Compute Express Link™ (CXL) 3.x IP Core is designed to meet the demands of next-generation heterogeneous computing systems, enabling high-speed, low-latency interconnect between CPUs, GPUs, FPGAs, DPUs, accelerators, memory expanders, and smart I/O devices.

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CXL Tester

Mobiveil’s CXL Tester is designed to validate Compute Express Link interfaces including CXL.io, CXL.cache, and CXL.mem protocols. It supports the testing of high-performance accelerators and memory expanders over PCIe Gen5/Gen6. The solution utilizes Altera FPGAs to deliver a scalable and adaptable test environment.

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Cyclone® 10 GX FPGA Development Kit

DK-DEV-10CX220-B: The Cyclone® 10 GX Development Kit is a cost-effective platform for transceiver-based applications, featuring high-speed I/O and robust memory support.

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Cyclone® 10 LP FPGA Development Kit

EK-10CL025U256: The Cyclone® 10 LP Evaluation Kit is a low-cost, low-power platform ideal for entry-level FPGA development and education.

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Showing 253-261 of 939 Offerings