Hero Banner image

Altera High Level Synthesis Compiler

Overview

The HLS Compiler is a high-level synthesis tool that converts untimed C++ code into optimized, production-quality RTL for Altera® FPGAs. By raising the abstraction level of design input, the HLS Compiler accelerates development and verification cycles compared to traditional RTL design flows. C++ models can typically be verified orders of magnitude faster, enabling more efficient iteration and system-level exploration. 

The HLS Compiler is included with the Quartus® Prime Pro Edition software installation

dam image

Features

ANSI C++ Design Entry

Uses untimed ANSI C++ as the golden design source

Architecture Exploration

Allows you to quickly explore multiple architectures through high-level directives

Constraint-Driven Design Simplification (1)

Simplifies tool usage by inferring design intent from high-level constraints

Constraint-Driven Design Simplification (2)

Simplifies tool usage by inferring design intent from high-level constraints

IP Generation via Platform Designer

Generates reusable intellectual property (IP) for system integration using the Platform Designer

Interface Type Inference

Supports inference of streaming, memory mapped, or wire interfaces

Timing-Driven Scheduling and Mapping

Performs device-specific timing-driven schedule optimization and technology mapping for Altera® FPGAs

Compiler Model and Standards Support

Supports a software compiler use model and industry standards including ac_int data types

Automated HTML Reporting

Detailed reporting feature for a birds-eye view: High-level design HTML reports are automatically generated during the simulation stage

Design Utilization Insights

Allows users to view and analyze: Area utilization, loop structure, memory usage, system data flow, clusters, and surrounding logic

Flexible IP Integration Flows

Supports multiple flows to integrate IP in a system. Integrate HLS code through direct HLD instantiation, through Platform Designer

Getting Started

The HLS Compiler is included in Quartus® Prime Pro Edition. License is required for Quartus® Prime Pro Edition, for licensing information, go to FPGA Licensing Support Center. See more HLS Compiler download and installation information.

See the Getting Started Guide