Altera High Level Synthesis Compiler

Overview

The HLS Compiler is a high-level synthesis tool that converts untimed C++ code into optimized, production-quality RTL for Altera® FPGAs. By raising the abstraction level of design input, the HLS Compiler accelerates development and verification cycles compared to traditional RTL design flows. C++ models can typically be verified orders of magnitude faster, enabling more efficient iteration and system-level exploration. 

The HLS Compiler is included with the Quartus® Prime Pro Edition software installation

Getting Started

The HLS Compiler is included in Quartus® Prime Pro Edition. License is required for Quartus® Prime Pro Edition, for licensing information, go to FPGA Licensing Support Center. See more HLS Compiler download and installation information.

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Latest Release Notes

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Documentation and Support

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