With Altera's SoC Embedded Design Suite (EDS), you get all the tools you need to work more productively, improve software quality, and ultimately get to market faster. The Altera® SoC EDS also enables you to:

  • Leverage the power of ARM® Development Studio 5 (DS-5™) Altera Edition (AE) to code, build, debug, and optimize your application
  • Expedite SoC embedded systems development with utility programs and run-time software
  • Jump start development with bare-metal and Linux application examples
ARM DS-5 AE Hardware Libraries Configuration Tools Examples

Powerful Eclipse IDE based on ARM DS-5 is power packed with features. Code, build, debug, and optimize in one IDE!

 

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Easy access to low-level hardware for configuration and control.

 

 

Altera-specific SoC configuration tools to improve productivity.

 

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Golden Hardware Reference Design (GHRD) for Altera SoC development kits.  U-Boot, Linux, and bare metal reference examples to jump start your development.

What's New in SoC EDS 16.0

  • Baremetal gcc updated to 5.2.0
  • DS-5 updated to 5.23.1
    • Streamline Performance Analyzer is now a seperated GUI from Eclipse with better UI reponsiveness
    • Gator versions prior to 5.17 are no longer supported
  • Secure Boot Suppport Added
  • Hardware libraries (HWLibs) includes External Memory Support
  • Goldedn Hardware Reference Design (GHRD) for Arria® 10 SoC Development Kit now targets Arria® 10 device production sillicon (Rev C)
  • Edition names have changed
    • SoC EDS Web Edition -> SoC EDS Lite Edition
    • SoC EDS Subscription Editoin -> SoC EDS Standard Edition

SoC EDS Release Note >>

SoC EDS / DS-5 Release History >>

FPGA-Adaptive Debug

FPGA-adaptive debug, Altera's only feature that gives a system-wide view of the SoC. This feature allows you to:

  • Cross-trigger between the HPS and the FPGA boundary with ease
  • Correlate FPGA and HPS events with high-resolution timestamps
  • Begin quick debugging with the low-cost USB-Blaster™ II

 

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